dsPIC30F / dsPIC33F Instruction Set

  • W … Words (ワード)
  • C … Cycles (サイクル)

Move

ニーモニック オペランド 説明 W C
EXCH Wns,Wnd Swap Wns and Wnd 1 1
MOV f {,WREG}※1 Move f to destination 1 1
WREG,f Move WREG to f 1 1
f,Wnd Move f to Wnd 1 1
Wns,f Move Wns to f 1 1
MOV.B #lit8,Wnd Move 8-bit literal to Wnd 1 1
MOV #lit16,Wnd Move 16-bit literal to Wnd 1 1
[Ws+Slit10],Wnd Move [Ws + signed 10-bit offset] to Wnd 1 1
Wns,[Wd+Slit10] Move Wns to [Wd + signed 10-bit offset] 1 1
Ws,Wd Move Ws to Wd 1 1
MOV.D Ws,Wnd Move double Ws to Wnd:Wnd + 1 1 2
Wns,Wd Move double Wns:Wns + 1 to Wd 1 2
SWAP Wn Wn = byte or nibble swap Wn 1 1
TBLRDH Ws,Wd Read high program word to Wd 1 2
TBLRDL Ws,Wd Read low program word to Wd 1 2
TBLWTH Ws,Wd Write Ws to high program word 1 2
TBLWTL Ws,Wd Write Ws to low program word 1 2
※1 When the optional {,WREG} operand is specified, the destination of the instruction is WREG. When {,WREG} is not specified, the destination of the instruction is the file register f.

Math

ニーモニック オペランド 説明 W C
ADD f {,WREG}※1 Destination = f + WREG 1 1
#lit10,Wn Wn = lit10 + Wn 1 1
Wb,#lit5,Wd Wd = Wb + lit5 1 1
Wb,Ws,Wd Wd = Wb + Ws 1 1
ADDC f {,WREG}※1 Destination = f + WREG + (C) 1 1
#lit10,Wn Wn = lit10 + Wn + (C) 1 1
Wb,#lit5,Wd Wd = Wb + lit5 + (C) 1 1
Wb,Ws,Wd Wd = Wb + Ws + (C) 1 1
DAW.B Wn Wn = decimal adjust Wn 1 1
DEC f {,WREG}※1 Destination = f – 1 1 1
Ws,Wd Wd = Ws – 1 1 1
DEC2 f {,WREG}※1 Destination = f – 2 1 1
Ws,Wd Wd = Ws – 2 1 1
DIV.S Wm, Wn Signed 16/16-bit integer divide 1 18※2
DIV.SD Wm, Wn Signed 32/16-bit integer divide 1 18※2
DIV.U Wm, Wn Unsigned 16/16-bit integer divide 1 18※2
DIV.UD Wm, Wn Unsigned 32/16-bit integer divide 1 18※2
DIVF Wm, Wn Signed 16/16-bit fractional divide 1 18※2
INC f {,WREG}※1 Destination = f + 1 1 1
Ws,Wd Wd = Ws + 1 1 1
INC2 f {,WREG}※1 Destination = f + 2 1 1
Ws,Wd Wd = Ws + 2 1 1
MUL f W3:W2 = f * WREG 1 1
MUL.SS Wb,Ws,Wnd {Wnd + 1,Wnd} = sign(Wb) * sign(Ws) 1 1
MUL.SU Wb,#lit5,Wnd {Wnd + 1,Wnd} = sign(Wb) * unsign(lit5) 1 1
Wb,Ws,Wnd {Wnd + 1,Wnd} = sign(Wb) * unsign(Ws) 1 1
MUL.US Wb,Ws,Wnd {Wnd + 1,Wnd} = unsign(Wb) * sign(Ws) 1 1
MUL.UU Wb,#lit5,Wnd {Wnd + 1,Wnd} = unsign(Wb) * unsign(lit5) 1 1
Wb,Ws,Wnd {Wnd + 1,Wnd} = unsign(Wb) * unsign(Ws) 1 1
SE Ws,Wnd Wnd = sign-extended Ws 1 1
SUB f {,WREG}※1 Destination = f – WREG 1 1
#lit10,Wn Wn = Wn – lit10 1 1
Wb,#lit5,Wd Wd = Wb – lit5 1 1
Wb,Ws,Wd Wd = Wb – Ws 1 1
SUBB f {,WREG}※1 Destination = f – WREG – (C) 1 1
#lit10,Wn Wn = Wn – lit10 – (C) 1 1
Wb,#lit5,Wd Wd = Wb – lit5 – (C) 1 1
Wb,Ws,Wd Wd = Wb – Ws – (C) 1 1
SUBBR f {,WREG}※1 Destination = WREG – f – (C) 1 1
Wb,#lit5,Wd Wd = lit5 – Wb – (C) 1 1
Wb,Ws,Wd Wd = Ws – Wb – (C) 1 1
SUBR f {,WREG}※1 Destination = WREG – f 1 1
Wb,#lit5,Wd Wd = lit5 – Wb 1 1
Wb,Ws,Wd Wd = Ws – Wb 1 1
ZE Ws,Wnd Wnd = zero-extended Ws 1 1
※1 When the optional {,WREG} operand is specified, the destination of the instruction is WREG. When {,WREG} is not specified, the destination of the instruction is the file register f.
※2 The divide instructions must be preceded with a “REPEAT #17” instruction, such that they are executed 18 consecutive times.

Logic

ニーモニック オペランド 説明 W C
AND f {,WREG}※1 Destination = f .AND. WREG 1 1
#lit10,Wn Wn = lit10 .AND. Wn 1 1
Wb,#lit5,Wd Wd = Wb .AND. lit5 1 1
Wb,Ws,Wd Wd = Wb .AND. Ws 1 1
CLR f f = 0x0000 1 1
WREG WREG = 0x0000 1 1
Wd Wd = 0x0000 1 1
COM f {,WREG}※1 Destination = f 1 1
Ws,Wd Wd = Ws 1 1
IOR f {,WREG}※1 Destination = f .IOR. WREG 1 1
#lit10,Wn Wn = lit10 .IOR. Wn 1 1
Wb,#lit5,Wd Wd = Wb .IOR. lit5 1 1
Wb,Ws,Wd Wd = Wb .IOR. Ws 1 1
NEG f {,WREG}※1 Destination = f + 1 1 1
Ws,Wd Wd = Ws + 1 1 1
SETM f f = 0xFFFF 1 1
WREG WREG = 0xFFFF 1 1
Wd Wd = 0xFFFF 1 1
XOR f {,WREG}※1 Destination = f .XOR. WREG 1 1
#lit10,Wn Wn = lit10 .XOR. Wn 1 1
Wb,#lit5,Wd Wd = Wb .XOR. lit5 1 1
Wb,Ws,Wd Wd = Wb .XOR. Ws 1 1
※1 When the optional {,WREG} operand is specified, the destination of the instruction is WREG. When {,WREG} is not specified, the destination of the instruction is the file register f.

Rotate / Shift

ニーモニック オペランド 説明 W C
ASR f {,WREG}※1 Destination = arithmetic right shift f 1 1
Ws,Wd Wd = arithmetic right shift Ws 1 1
Wb,#lit4,Wnd Wnd = arithmetic right shift Wb by lit4 1 1
Wb,Wns,Wnd Wnd = arithmetic right shift Wb by Wns 1 1
LSR f {,WREG}※1 Destination = logical right shift f 1 1
Ws,Wd Wd = logical right shift Ws 1 1
Wb,#lit4,Wnd Wnd = logical right shift Wb by lit4 1 1
Wb,Wns,Wnd Wnd = logical right shift Wb by Wns 1 1
RLC f {,WREG}※1 Destination = rotate left through Carry f 1 1
Ws,Wd Wd = rotate left through Carry Ws 1 1
RLNC f {,WREG}※1 Destination = rotate left (no Carry) f 1 1
Ws,Wd Wd = rotate left (no Carry) Ws 1 1
RRC f {,WREG}※1 Destination = rotate right through Carry f 1 1
Ws,Wd Wd = rotate right through Carry Ws 1 1
RRNC f {,WREG}※1 Destination = rotate right (no Carry) f 1 1
Ws,Wd Wd = rotate right (no Carry) Ws 1 1
SL f {,WREG}※1 Destination = left shift f 1 1
Ws,Wd Wd = left shift Ws 1 1
Wb,#lit4,Wnd Wnd = left shift Wb by lit4 1 1
Wb,Wns,Wnd Wnd = left shift Wb by Wns 1 1
※1 When the optional {,WREG} operand is specified, the destination of the instruction is WREG. When {,WREG} is not specified, the destination of the instruction is the file register f.

Bit

ニーモニック オペランド 説明 W C
BCLR f,#bit4 Bit clear f 1 1
Ws,#bit4 Bit clear Ws 1 1
BSET f,#bit4 Bit set f 1 1
Ws,#bit4 Bit set Ws 1 1
BSW.C Ws,Wb Write C bit to Ws<Wb> 1 1
BSW.Z Ws,Wb Write Z bit to Ws<Wb> 1 1
BTG f,#bit4 Bit toggle f 1 1
Ws,#bit4 Bit toggle Ws 1 1
BTST f,#bit4 Bit test f 1 1
BTST.C Ws,#bit4 Bit test Ws to C 1 1
BTST.Z Ws,#bit4 Bit test Ws to Z 1 1
BTST.C Ws,Wb Bit test Ws<Wb> to C 1 1
BTST.Z Ws,Wb Bit test Ws<Wb> to Z 1 1
BTSTS f,#bit4 Bit test f then set f 1 1
BTSTS.C Ws,#bit4 Bit test Ws to C then set Ws 1 1
BTSTS.Z Ws,#bit4 Bit test Ws to Z then set Ws 1 1
FBCL Ws,Wnd Find bit change from left (MSb) side 1 1
FF1L Ws,Wnd Find first one from left (MSb) side 1 1
FF1R Ws,Wnd Find first one from right (LSb) side 1 1

Compare / Skip

Assembly Syntax Description Words Cycles※1
BTSC f,#bit4 Bit test f, skip if clear 1 1 (2 or 3)
Ws,#bit4 Bit test Ws, skip if clear 1 1 (2 or 3)
BTSS f,#bit4 Bit test f, skip if set 1 1 (2 or 3)
Ws,#bit4 Bit test Ws, skip if set 1 1 (2 or 3)
CP f Compare (f – WREG) 1 1
Wb,#lit5 Compare (Wb – lit5) 1 1
Wb,Ws Compare (Wb – Ws) 1 1
CP0 f Compare (f – 0x0000) 1 1
Ws Compare (Ws – 0x0000) 1 1
CPB f Compare with Borrow (f – WREG – C) 1 1
Wb,#lit5 Compare with Borrow (Wb – lit5 – C) 1 1
Wb,Ws Compare with Borrow (Wb – Ws – C) 1 1
CPSEQ Wb, Wn Compare (Wb – Wn), skip if = 1 1 (2 or 3)
CPSGT Wb, Wn Compare (Wb – Wn), skip if > 1 1 (2 or 3)
CPSLT Wb, Wn Compare (Wb – Wn), skip if < 1 1 (2 or 3)
CPSNE Wb, Wn Compare (Wb – Wn), skip if ≠ 1 1 (2 or 3)
※1 Conditional skip instructions execute in 1 cycle ifthe skip is not taken, 2 cycles if the skip is taken over a one-word instruction and 3 cycles if the skip is taken over a two-word instruction.

Program Flow

ニーモニック オペランド 説明 W C
BRA Expr Branch unconditionally 1 2
Wn Computed branch 1 2
C,Expr Branch if Carry (no Borrow) 1 1 (2)※1
GE,Expr Branch if greater than or equal 1 1 (2)※1
GEU,Expr Branch if unsigned greater than or equal 1 1 (2)※1
GT,Expr Branch if greater than 1 1 (2)※1
GTU,Expr Branch if unsigned greater than 1 1 (2)※1
LE,Expr Branch if less than or equal 1 1 (2)※1
LEU,Expr Branch if unsigned less than or equal 1 1 (2)※1
LT,Expr Branch if less than 1 1 (2)※1
LTU,Expr Branch if unsigned less than 1 1 (2)※1
N,Expr Branch if Negative 1 1 (2)※1
NC,Expr Branch if not Carry (Borrow) 1 1 (2)※1
NN,Expr Branch if not Negative 1 1 (2)※1
NOV,Expr Branch if not Overflow 1 1 (2)※1
NZ,Expr Branch if not Zero 1 1 (2)※1
OA,Expr Branch if Accumulator A Overflow 1 1 (2)※1
OB,Expr Branch if Accumulator B Overflow 1 1 (2)※1
OV,Expr Branch if Overflow 1 1 (2)※1
SA,Expr Branch if Accumulator A Saturate 1 1 (2)※1
SB,Expr Branch if Accumulator B Saturate 1 1 (2)※1
Z,Expr Branch if Zero 1 1 (2)※1
CALL Expr Call subroutine 2 2
Wn Call indirect subroutine 1 2
DO #lit14,Expr Do code through PC + Expr, (lit14 + 1) times 2 2
Wn,Expr Do code through PC + Expr, (Wn + 1) times 2 2
GOTO Expr Go to address 2 2
Wn Go to address indirectly 1 2
RCALL Expr Relative call 1 2
Wn Computed call 1 2
REPEAT #lit14 Repeat next instruction (lit14 + 1) times 1 1
Wn Repeat next instruction (Wn + 1) times 1 1
RETFIE   Return from interrupt enable 1 3 (2)※2
RETLW #lit10,Wn Return with lit10 in Wn 1 3 (2)※2
RETURN   Return from subroutine 1 3 (2)※2
※1 Conditional branch instructions execute in 1 cycle if the branch is not taken, or 2 cycles if the branch is taken.
※2 RETURNinstructions execute in 3 cycles, but if an exception is pending, they execute in 2 cycles.

Shadow / Stack

ニーモニック オペランド 説明 W C
LNK #lit14 Link Frame Pointer 1 1
POP f POP TOS to f 1 1
Wd POP TOS to Wd 1 1
POP.D Wnd Double POP from TOS to Wnd:Wnd + 1 1 2
POP.S   POP shadow registers 1 1
PUSH f PUSH f to TOS 1 1
Ws PUSH Ws to TOS 1 1
PUSH.D Wns PUSH double Wns:Wns + 1 to TOS 1 2
PUSH.S   PUSH shadow registers 1 1
ULNK   Unlink Frame Pointer 1 1

Control

ニーモニック オペランド 説明 W C
CLRWDT   Clear Watchdog Timer 1 1
DISI #lit14 Disable interrupts for (lit14 + 1) instruction cycles 1 1
NOP   No operation 1 1
NOPR   No operation 1 1
PWRSAV #lit1 Enter Power-saving mode lit1 1 1
Reset   Software device Reset 1 1

DSP

ニーモニック オペランド 説明 W C
ADD Acc Add accumulators 1 1
Ws,#Slit4,Acc 16-bit signed add to Acc 1 1
CLR Acc,Wx,Wxd,Wy,Wyd,AWB Clear Acc 1 1
ED Wm*Wm,Acc,Wx,Wy,Wxd Euclidean distance (no accumulate) 1 1
EDAC Wm*Wm,Acc,Wx,Wy,Wxd Euclidean distance 1 1
LAC Ws,#Slit4,Acc Load Acc 1 1
MAC Wm*Wn,Acc,Wx,Wxd,Wy,Wyd,AWB Multiply and accumulate 1 1
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd Square and accumulate 1 1
MOVSAC Acc,Wx,Wxd,Wy,Wyd,AWB Move Wx to Wxd and Wy to Wyd 1 1
MPY Wm*Wn,Acc,Wx,Wxd,Wy,Wyd Multiply Wn by Wm to Acc 1 1
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd Square to Acc 1 1
MPY.N Wm*Wn,Acc,Wx,Wxd,Wy,Wyd -(Multiply Wn by Wm) to Acc 1 1
MSC Wm*Wn,Acc,Wx,Wxd,Wy,Wyd,AWB Multiply and subtract from Acc 1 1
NEG Acc Negate Acc 1 1
SAC Acc,#Slit4,Wd Store Acc 1 1
SAC.R Acc,#Slit4,Wd Store rounded Acc 1 1
SFTAC Acc,#Slit6 Arithmetic shift Acc by Slit6 1 1
Acc,Wn Arithmetic shift Acc by (Wn) 1 1
SUB Acc Subtract accumulators 1 1

参考

  • dsPIC30F/33F Programmer’s Reference Manual (DS70157C)
    (3.3 Instruction Set Summary Tables)